1. Field of the Invention
The present invention relates to a D/A conversion circuit, in particular a current output type D/A conversion circuit.
2. Description of Related Art
There are various voltage amplitude formats for television signals, including 1V amplitude for component signals (Y: brightness, Pr: color-difference signal 1, and Pb: color-difference signal 2), and 1.32V amplitude for NTSC signals including a copyguard function. Furthermore, there are also voltage amplitude formats for connection to analog monitors of personal computers, including 0.7V amplitude for RGB signals. As described above, there are a variety of voltage amplitude formats for video signals of television and the like. Further, there are other various voltage amplitude formats for applications other than video signals of television and the like.
Conventionally, different current output type D/A conversion circuits have been used for each of these various voltage amplitude formats. FIG. 6 shows a typical current output type D/A conversion circuit 1 in the related art. As shown in FIG. 6, the current output type D/A conversion circuit 1 includes a reference current setting unit 10 and a current cell output unit 20. The reference current setting unit 10 includes a differential amplifier AMP11, a PMOS transistor M11, and a resistive element R11. A source-drain current Iref flowing through PMOS transistor M11 flows to the resistive element R11. In this way, a potential generated at the node A is input to the non-inverting input terminal of the differential amplifier AMP11. A reference voltage Vref is input to the inverting terminal of the differential amplifier AMP11, and the output terminal of the differential amplifier AMP11 is connected to the gate of the PMOS transistor M11. Therefore, with this configuration, a negative feedback is applied such that the voltage at the node A becomes equal to the reference voltage Vref.
The current cell output unit 20 includes PMOS transistors M21 to M2m, switch circuits SW21 to SW2m, and an output resistive element R21. The PMOS transistor M11 and the PMOS transistors M21 to M2m constitute a current-mirror circuit that uses the PMOS transistor M11 as an input transistor. Therefore, the PMOS transistors M21 to M2m can feed an amount of current according to the source-drain current flowing through the PMOS transistor M11 based on their respective current-mirror ratios.
The switch circuits SW21 to SW2m are controlled into On-states or Off-states according to an input digital signal. Among these PMOS transistors M21 to M2m, transistors that are turned on according to the value of the digital signal let currents flow between their sources and drains, and their added current is supplied to the node B. This added current is what is obtained by converting the above-mentioned digital signal into an analog current signal. In the following explanation, this analog current signal is referred to as “D/A conversion current Ida”. By feeding this D/A conversion current Ida through the output resistive element R21, an analog output voltage Vout can be generated. The above-mentioned standards are determined such that the amplitude level of this output voltage Vout becomes 0.7V amplitude, 1V amplitude, or 1.3V amplitude or the like as described above.
In recent years, the demand for reduction in manufacturing costs and the like has been growing. Therefore, if the above-described various voltage amplitude formats can be dealt with by a single current output type D/A conversion circuit with ease, the number of necessary current output type D/A conversion circuits can be reduced, and thus enabling the reduction in manufacturing costs of chips. Note that examples of the current output type D/A conversion circuit capable of changing the amplitude level of the voltage Vout output from the current cell output unit include a technique disclosed in Japanese Unexamined Patent Application Publication No. 2002-26729 (Patent document 1). Further, Japanese Unexamined Patent Application Publication No. 2006-197052 (Patent document 2) discloses a technique for a D/A conversion circuit capable of reducing influences by manufacturing variations.